The software architecture is component-based with clear, well-defined interfaces. Similar to JavaBeans, CORBA, and COM/DCOM, the basic entity in J-Sim is components, and an application is simply a composition of components. Ports are part of a component and are used by the component to communicate with other components. However, unlike the above component-based software packages/standards, the components defined in J-Sim are loosely coupled and autonomous. By loosely coupled, we mean the behavior of a component is specified in terms of contracts. A contract is bound to a specific port or a group of ports, and defines the causality of data sent/received between the component that owns the port(s) and whichever components that are connected to the port(s). In particular, it does not specify the components that participate in the communication. Component binding is deferred until system integration time. By autonomous, we refer to the capability of components to handle data in independent execution contexts. When data arrives at a port of a component, the component processes the data immediately in an independent execution context. The interference between different pieces of data handled by the same component at the same time is minimal.
The ability to handle data in independent execution contexts, along with the fact that components are loosely coupled and only bound to one another at system integration time, is the key reason that a component can be reused in other software systems with the same contract context, in much the same fashion as IC chips are used in hardware design. Refer to autonomous component architecture for a detailed account.
In J-Sim, execution contexts are implemented by Java threads, with the thread scheduler in the Java Virtual Machine (JVM) scheduling thread execution. The runtime contains three classes, WorkerThread, WorkerManager and WorkerPool:
In J-Sim, the simulation engine extends the WorkerPool class and monitors the activities of all WorkerThreads. It maintains a globally-observed, virtual system time that is proportional to the real time (e.g. 1 second in virtual time = 1000 seconds in real time). When no WorkerThread is currently active, the simulation engine adjusts the virtual system time to the nearest future so that at least one WorkerThread may become active.
With the above mechanism, a simulation runs in the same manner a real system does, in the sense that event executions are carried out in real time as opposed to at fixed time points in discrete event simulation. The interactions and interferences among event executions, hence take place naturally as in real systems. When no thread is currently active, the simulation engine performs a "fast-forward" operation in time to the nearest future at which at least one execution can be activated. This preserves the behavior of real systems and hence enhances the fidelity of the simulation. The thread overhead incurred is mitigated by reusing threads (see Section 3.2 of the autonomous component architecture).

Figure 1. The internal structure of a node
For the purpose of network modeling and simulation, we have

Figure 2. The class pyramid in J-Sim.
The implication of the implementation is three fold:
| Network Architecture | Application | Socket Layer | Transport | Routing | Traffic Model | Tagger Marker | Buffer Management | NI Scheduling | |
|---|---|---|---|---|---|---|---|---|---|
| Best Effect Services | FTP, FSP WWW |
BSD 4.3 | TCP-Reno TCP-Tahoe TCP-Vegas TCP Sack UDP |
RIP (DV) OSPFv2 Multicast shortest path tree Multicast minimum load tree Multicast Steiner tree DVMRP MOSPF CBT |
Drop-Tail | FIFO | |||
| Differentiated Services | Token Bucket TSW ETSW |
RED FRED SRED BRED |
FIFO | ||||||
| Integrated Services | RSVP | Unicast QoS routing QoS-enhanced OSPFv2 QoS-enhanced CBT |
Periodic message (CBR) Peak rate model Leaky bucket model Token bucket model IETF/Intserv Flowspec (r,t)-smooth model (C,D)-smooth model |
RM EDF Stop-and-go DCTS VirtualClock LFVC SCFQ PGPS STFQ WF2Q Leave-in-time |
| FTP: file transfer protocol | FSP: file service protocol |
| BSD: Berkeley socket distribution | TCP: transmission control protocol |
| RIP: routing information protocol | OSPF: open shortest path first |
| DVMRP: distance vector multicast routing protocol | MOSPF: multicast extension to OSPF |
| CBT: core based tree protocol | FIFO: first in first out |
| TSW: time sliding window | ETSW: enhanced time sliding window |
| RED: random early drop | FRED: fair random early drop |
| SRED: stable random early drop | BRED: balanced random early drop |
| RSVP: Resource reservation protocol | CBR: constant bit rate |
| RM: rate monotonic | EDF: earliest deadline first |
| DCTS: distance constrained task system | LFVC: leap forward virtual clock |
| SCFQ: self-clocked fair queueing | PGPS: packet-by-packet generalized processing sharing |
| STFQ: start time fair queueing | WF2Q: worst-case fair weighted fair queueing |
Table 1. Algorithms and protocols supported in J-Sim.
We provide a dual-language environment in which Java is used to create components and a script language is used as the glue or control language to integrate components at run time and to provide high-level, dynamic control. This facilitates fast configuration of customized simulation scenarios, and on-line monitoring and data collection. In the current release, we have fully integrated J-Sim with a Java implementation of the Tcl interpreter (with the Tcl/Java API extension), called Jacl and developed by Scriptics Corporation. This enables access to, and manipulation of, Java objects, such as creating an object from a Java class and invoking a method or accessing a field variable of a Java object, in the Tcl environment.
In conjunction with the dual-language environment, we have also introduce, and export, the information and event ports for data collection and debugging at the component level. One may connect an "instrument" component or script to the information port and the ports in the event group of a component of interest to configure/inspect the component at runtime. This closely mimics the IC debugging and testing process.
Currently we are working on defining and implementing generic interface classes for trace-driven simulation, with which (i) the network of interest can be emulated based on real network traffic loads and (ii) fidelity of J-Sim can be validated (and the (in)accuracy quantitatively characterized) through analysis/comparison of real network performance data and simulation data.
Currently we are studying how to realize network emulation by (i) porting real applications (e.g., WWW traffic and audio/video streams) on top of the J-Sim socket layers or (ii) replacing NIC modules with true device driver codes.